The IEEE 802.16e LDPC Decoder Core performs
iterative decoding of channel data that has been encoded as described
in the IEEE Std 802.16e standard.
Through parallel processing with parameterizable number of PUs
the decoder is capable of achieving ANY desired throughput (for
example: throughput of 80 Mbit/sec with 6 Pus at 200 MHz clock
frequency at lowest rate - 1/2).
The LDPC codes is preferable over CTC codes for several reasons:
1. Low complexity, results in small silicon area of only 125 Kgates
for 1 PU decoder. It is comparable even
to the inferior CC decoder.
2. LDPC codes are patent-free making them a perfect candidate
for high volumes low price communication chips.
3. The LDPC has a clear advantage over CTC enabling to encoding
codeword length up to 2304 bits
compared to 960 bits in the CTC. The performance
is 0.75 dB in favor of the LDPC in maximal FEC block
transmission conditions.
Download:
LDPC 802.16e decoder
Key Features:
 Support
all codes defined in the standard: 1/2, 2/3A, 2/3B, 3/4A, 3/4B,
5/6.
Support
all 19 codes lengths, from 576 to 2304 bits.
Programmable
number of iterations.
Internal
convergence test stops the decoder when data is fully recovered
(0 errors).
Decoded
data rate exceeds 12-20 Mb/s (rate depended) with 10 iterations
using 1 PU at 200-MHz clock frequency.
Code
synthesizable to ASIC and FPGA.
Performance graph
Fig
1. Decoding with 50 iterations for the codewords length 2304 at
rates 1/2 , 2/3A, 2/3B, 3/4A, 3/4B, 5/6 .
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